A CMOS Readout Circuit for Resistive Transducers Based on Algorithmic Resistance and Power Measurement.

MLA

Cai, Zeyu, et al. “A CMOS Readout Circuit for Resistive Transducers Based on Algorithmic Resistance and Power Measurement.” IEEE Sensors Journal, vol. 17, no. 23, Dec. 2017, pp. 7917–27. EBSCOhost, https://doi.org/10.1109/JSEN.2017.2764161.

APA

Cai, Z., Rueda Guerrero, L. E., Louwerse, A. M. R., Suy, H., van Veldhoven, R., Makinwa, K. A. A., & Pertijs, M. A. P. (2017). A CMOS Readout Circuit for Resistive Transducers Based on Algorithmic Resistance and Power Measurement. IEEE Sensors Journal, 17(23), 7917–7927. https://doi.org/10.1109/JSEN.2017.2764161

Chicago

Cai, Zeyu, Luis E. Rueda Guerrero, Alexander Mattheus Robert Louwerse, Hilco Suy, Robert van Veldhoven, Kofi A. A. Makinwa, and Michiel A. P. Pertijs. 2017. “A CMOS Readout Circuit for Resistive Transducers Based on Algorithmic Resistance and Power Measurement.” IEEE Sensors Journal 17 (23): 7917–27. doi:10.1109/JSEN.2017.2764161.