Back to Search Start Over

NPAM: NVM-Aware Page Allocation for Multi-Core Embedded Systems.

Authors :
Poursafaei, Farimah R.
Bazzaz, Mostafa
Ejlali, Alireza
Source :
IEEE Transactions on Computers; Oct2017, Vol. 66 Issue 10, p1703-1716, 14p
Publication Year :
2017

Abstract

Energy consumption is one of the prominent design constraints of multi-core embedded systems. Since the memory subsystem is responsible for a considerable portion of energy consumption of embedded systems, Non-Volatile Memories (NVMs) have been proposed as a candidate for replacing conventional memories such as SRAM and DRAM. The advantages of NVMs compared to conventional memories are that they consume less leakage power and provide higher density. However, these memories suffer from increased overhead of write operations and limited lifetime. In order to address these issues, researchers have proposed NVM-aware memory management techniques that consider the characteristics of the memories of the system when deciding on the placement of the application data. In systems equipped with memory management unit (MMU), the application data is partitioned into pages during the compile phase and the data is managed at page level during the runtime phase. In this paper we present an NVM-aware data partitioning and mapping technique for multi-core embedded systems equipped with MMU that specifies the placement of the application data based on access pattern of the data and characteristics of the memories. The experimental results show that the proposed technique improves the energy consumption of the system by 28.10 percent on average. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00189340
Volume :
66
Issue :
10
Database :
Complementary Index
Journal :
IEEE Transactions on Computers
Publication Type :
Academic Journal
Accession number :
125027980
Full Text :
https://doi.org/10.1109/TC.2017.2703824