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A self-duty-cycled 7.2-8.5 GHz IR-UWB receiver for low power and low data rate applications.

Authors :
Dehaese, Nicolas
Ben Amor, Inès
Tall, Ndiogou
Gaubert, Jean
Vauché, Rémy
Bourdel, Sylvain
Source :
Analog Integrated Circuits & Signal Processing; Jul2017, Vol. 92 Issue 1, p39-53, 15p
Publication Year :
2017

Abstract

A self-duty-cycled non-coherent impulse radio-ultra wideband receiver targeted at low-power and low-data-rate applications is presented. The receiver is implemented in a 130 nm CMOS technology and works in the 7.2-8.5 GHz UWB band, which covers the IEEE 802.15.4a and 802.15.6 mandatories high-band channels. The receiver architecture is based on a non-coherent RF front-end (high gain LNA and pulse detector) followed by a synchronizer block (clock and data recovery or CDR function and window generation block), which enables to shut down the power-hungry LNA between pulses to strongly reduce the receiver power consumption. The main functions of the receiver, i.e. the RF front-end and the CDR block, were measured stand-alone. A maximum gain of 40 dB at 7.2 GHz is measured for the LNA. The RF front-end achieves a very low turn-on time (<1 ns) and an average sensitivity of −92 dBm for a 10 BER at a 1 Mbps data rate. A root-mean-square (RMS) jitter of 7.9 ns is measured for the CDR for a power consumption of 54 µW. Simulation results of the fully integrated self-duty-cycled 7.2-8.5 GHz IR-UWB receiver (that includes the measured main functions) confirm the expected performances. The synchronizer block consumes only 125 µW and the power consumption of the whole receiver is 1.8 mW for a 3% power duty-cycle (on-window of 30 ns). [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
09251030
Volume :
92
Issue :
1
Database :
Complementary Index
Journal :
Analog Integrated Circuits & Signal Processing
Publication Type :
Academic Journal
Accession number :
123282133
Full Text :
https://doi.org/10.1007/s10470-017-0985-4