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A Study of Vertical Thin Poly-Si Channel Transfer Gate Structured CMOS Image Sensors.
- Source :
- IEEE Electron Device Letters; Feb2017, Vol. 38 Issue 2, p232-235, 4p
- Publication Year :
- 2017
-
Abstract
- In this letter, the image characteristics of CMOS image sensor (CIS) pixels using a vertical thin poly-Si channel (VTPC) transfer gate (TG) are established for the first time. The study of three-dimensional (3D) structures in the image sensor field has been started by 3D Flash memories. By adopting the poly-Si channel fabrication concept of 3D NAND flash memories—appropriately modified to fit the requirements of a TG in CIS pixel applications—the VTPC structure effectively suppresses the grain boundary effect. The VTPC-TG performance improves as the poly-Si channel becomes thinner. The possibility of implementing 3D pixel-based CIS is confirmed by applying the fabricated VTPC-TG to a mass-produced 1.12- \mu \textm BSI product, and using it to capture 5-Mpixel images. [ABSTRACT FROM PUBLISHER]
- Subjects :
- CMOS image sensors
THIN film transistors
NAND gates
Subjects
Details
- Language :
- English
- ISSN :
- 07413106
- Volume :
- 38
- Issue :
- 2
- Database :
- Complementary Index
- Journal :
- IEEE Electron Device Letters
- Publication Type :
- Academic Journal
- Accession number :
- 121012862
- Full Text :
- https://doi.org/10.1109/LED.2016.2641579