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Resilient die-stacked DRAM caches.

Authors :
Sim, Jaewoong
Loh, Gabriel H.
Sridharan, Vilas
O'Connor, Mike
Source :
ACM SIGARCH Computer Architecture News; Jun2013, Vol. 41 Issue 3, p416-427, 12p
Publication Year :
2013

Details

Language :
English
ISSN :
01635964
Volume :
41
Issue :
3
Database :
Complementary Index
Journal :
ACM SIGARCH Computer Architecture News
Publication Type :
Periodical
Accession number :
115472809
Full Text :
https://doi.org/10.1145/2508148.2485958
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