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Single-Event Upset Characterization Across Temperature and Supply Voltage for a 20-nm Bulk Planar CMOS Technology.

Authors :
Kauppila, J. S.
Kay, W. H.
Haeffner, T. D.
Rauch, D. L.
Assis, T. R.
Mahatme, N. N.
Gaspard, N. J.
Bhuva, B. L.
Alles, M. L.
Holman, W. T.
Massengill, L. W.
Source :
IEEE Transactions on Nuclear Science; Dec2015 Part 1, Vol. 62 Issue 6a, p2613-2619, 7p
Publication Year :
2015

Abstract

Isotropic alpha particle single-event upsets (SEU) in flip-flops are characterized over temperature and voltage supply variations in a 20-nm bulk planar complementary metal-oxide semiconductor (CMOS) process. The decrease of the MOSFET drain current in saturation with respect to increased temperature and reduced supply voltage explains the increased SEU sensitivity of the flip-flop designs. Experimental SEU cross sections from isotropic Americium-241, 5.4-MeV alpha particle show irradiation increases by 30\times on average, and up to orders of magnitude, as a result of increased device temperature and reduced supply voltage. [ABSTRACT FROM PUBLISHER]

Details

Language :
English
ISSN :
00189499
Volume :
62
Issue :
6a
Database :
Complementary Index
Journal :
IEEE Transactions on Nuclear Science
Publication Type :
Academic Journal
Accession number :
115132587
Full Text :
https://doi.org/10.1109/TNS.2015.2493886