Fabrication of Carrier-Doped Si Nanoarchitecture for Thermoelectric Material by Ultrathin SiO Film Technique.

We present a carrier-doped Si nanoarchitecture for thermoelectric material, consisting of a stacked structure of carrier-doped Si layer/Si nanocrystals (NCs) with oriented crystal. The NCs and carrier-doped Si layers act as phonon scattering centers and carrier transport layers, respectively. The NCs were covered with ultrathin SiO films. Solid-phase epitaxy (SPE) of the Si layers on the amorphous ultrathin SiO films was achieved using nanowindows in the ultrathin SiO films. By such integration of the ultrathin SiO film technique for epitaxial growth of NCs and the SPE method, we fabricated a Ga-doped Si nanoarchitecture and achieved carrier doping of 10 cm to 10 cm. The thermal conductivity was reduced to a value similar to that of amorphous Si. The thermal resistance per stacking layer in the nanoarchitecture was 7 to 10 times higher than that of connected Si NCs, which exhibited thermal conductivity 200 times smaller than that of bulk Si. This large thermal resistance in the nanoarchitecture may result from precipitation of Ga atoms at the ultrathin SiO film interfaces. These Ga atoms played two roles: as dopants for electrical conductivity enhancement and as phonon scatters for thermal conductivity reduction. This nanoarchitecture demonstrates the possibility of achieving high electrical conductivity and low thermal conductivity. [ABSTRACT FROM AUTHOR]