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A 128 Gb 3b/cell V-NAND Flash Memory With 1 Gb/s I/O Rate.

Authors :
Jeong, Woopyo
Im, Jae-woo
Kim, Doo-Hyun
Nam, Sang-Wan
Shim, Dong-Kyo
Choi, Myung-Hoon
Yoon, Hyun-Jun
Kim, Dae-Han
Kim, You-Se
Park, Hyun-Wook
Kwak, Dong-Hun
Park, Sang-Won
Yoon, Seok-Min
Hahn, Wook-Ghee
Ryu, Jin-Ho
Shim, Sang-Won
Kang, Kyung-Tae
Ihm, Jeong-Don
Kim, In-Mo
Lee, Doo-Sub
Source :
IEEE Journal of Solid-State Circuits; Jan2016, Vol. 51 Issue 1, p204-212, 9p
Publication Year :
2016

Abstract

Most memory-chip manufacturers keep trying to supply cost-effective storage devices with high-performance characteristics such as shorter tPROG, lower power consumption and higher endurance. For many years, every effort has been made to shrink die size to lower cost and to improve performance. However, the previously used node-shrinking methodology is facing challenges due to increased cell-to-cell interference and patterning difficulties caused by decreasing dimension. To overcome these limitations, 3D-stacking technology has been developed. As a result of long and focused research in 3D stacking technology, we succeed in developing 128 Gb 3b/cell Vertical NAND with 32 stack WL layers for the first time, which is the smallest 128 Gb NAND Flash. The die size is 68.9 mm^2, program time is 700 us and I/O rate is 1 Gb/s. [ABSTRACT FROM PUBLISHER]

Details

Language :
English
ISSN :
00189200
Volume :
51
Issue :
1
Database :
Complementary Index
Journal :
IEEE Journal of Solid-State Circuits
Publication Type :
Academic Journal
Accession number :
112077268
Full Text :
https://doi.org/10.1109/JSSC.2015.2474117