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Impact of guard ring layout on the stacked low-voltage PMOS for high-voltage ESD protection.

Authors :
Liao, Seian-Feng
Tang, Kai-Neng
Ker, Ming-Dou
Yeh, Jia-Rong
Chiou, Hwa-Chyi
Huang, Yeh-Jen
Tsai, Chun-Chien
Jou, Yeh-Ning
Lin, Geeng-Lih
Source :
2015 Sensor Signal Processing for Defence (SSPD); 2015, p1-4, 4p
Publication Year :
2015

Details

Language :
English
ISBNs :
9781479974443
Database :
Complementary Index
Journal :
2015 Sensor Signal Processing for Defence (SSPD)
Publication Type :
Conference
Accession number :
111125363
Full Text :
https://doi.org/10.1109/ECCTD.2015.7300108