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Enhancement mode p-channel SnO thin-film transistors with dual-gate structures.

Authors :
Yong-Jin Choi
Young-Joon Han
Chan-Yong Jeong
Sang-Hun Song
Geun Woo Baek
Sung Hun Jin
Hyuck-In Kwon
Source :
Journal of Vacuum Science & Technology: Part B-Nanotechnology & Microelectronics; Jul/Aug2015, Vol. 33 Issue 4, p041203-1-041203-5, 5p
Publication Year :
2015

Abstract

The authors demonstrate the enhancement mode p-type SnO thin-film transistors (TFTs) using dual gate (DG) structures. The cross-linked polyvinyl alcohol dielectric with a polymethylmethacrylate buffer layer is formed as a top gate (TG) insulator of the DG SnO TFT. The fabricated DG SnO TFT exhibits better electrical performances than the bottom gate (BG) and TG SnO TFTs including higher field-effect mobility and smaller subthreshold slope. In fabricated DG TFTs, the threshold voltage (V<subscript>th</subscript>) of the BG TFT is linearly modulated by the voltage applied to the TG electrode. The BG transfer curve exhibits a depletion mode operation when measured while TG is grounded, but operates in the enhancement mode with a negative V<subscript>th</subscript> (=-0.9 V) when a positive bias of 10V is applied to the TG electrode. The enhancement mode operation of p-type SnO TFTs can increase the output voltage swing range and decreases the off-stage leakage currents of the complementary logic circuits. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
21662746
Volume :
33
Issue :
4
Database :
Complementary Index
Journal :
Journal of Vacuum Science & Technology: Part B-Nanotechnology & Microelectronics
Publication Type :
Academic Journal
Accession number :
108581195
Full Text :
https://doi.org/10.1116/1.4923236