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A hierarchical switch matrix and interconnect resources test in Virtex-5 FPGA.

Authors :
Ruan, A.W.
Tian, W.
Ni, B.
Wu, K.
Source :
2014 International Symposium on Integrated Circuits (ISIC); 2014, p111-114, 4p
Publication Year :
2014

Details

Language :
English
ISBNs :
9781479948338
Database :
Complementary Index
Journal :
2014 International Symposium on Integrated Circuits (ISIC)
Publication Type :
Conference
Accession number :
102548288
Full Text :
https://doi.org/10.1109/ISICIR.2014.7029438