Delaying physical register allocation through virtual-physical registers.

MLA

Monreal, Teresa, et al. “Delaying Physical Register Allocation through Virtual-Physical Registers.” Proceedings of the 32nd Annual ACM IEEE International Symposium Microarchitecture, Nov. 1999, pp. 186–92. EBSCOhost, widgets.ebscohost.com/prod/customlink/proxify/proxify.php?count=1&encode=0&proxy=&find_1=&replace_1=&target=https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&scope=site&db=edb&AN=101467781&authtype=sso&custid=ns315887.

APA

Monreal, T., González, A., Valero, M., González, J., & Viñals, V. (1999). Delaying physical register allocation through virtual-physical registers. Proceedings of the 32nd Annual ACM IEEE International Symposium Microarchitecture, 186–192.

Chicago

Monreal, Teresa, Antonio González, Mateo Valero, José González, and Victor Viñals. 1999. “Delaying Physical Register Allocation through Virtual-Physical Registers.” Proceedings of the 32nd Annual ACM IEEE International Symposium Microarchitecture, November, 186–92. http://widgets.ebscohost.com/prod/customlink/proxify/proxify.php?count=1&encode=0&proxy=&find_1=&replace_1=&target=https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&scope=site&db=edb&AN=101467781&authtype=sso&custid=ns315887.