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Irradiation and Temperature Effects for a 32 nm RF Silicon-on-Insulator CMOS Process.

Authors :
Haeffner, T. D.
Loveless, T. D.
Zhang, E. X.
Sternberg, A. L.
Jagannathan, S.
Schrimpf, R. D.
Kauppila, J. S.
Alles, M. L.
Fleetwood, D. M.
Massengill, L. W.
Haddad, N. F.
Source :
IEEE Transactions on Nuclear Science; Dec2014 Part 1, Vol. 61 Issue 6, p3037-3042, 6p
Publication Year :
2014

Abstract

The impacts of total ionizing dose (TID), temperature and RF stress on the DC and RF performance of a commercial 32 nm RF silicon-on-insulator CMOS technology are presented. Temperature dependence is the overwhelmingly dominant single factor affecting the DC and RF performance, with the combined effects of elevated temperature and TID showing the most pronounced degradation. The most significant effect due to TID is an increase in off-state leakage current. Key DC and RF parameters of this 32 nm RF process degrade less than those of an otherwise similar 45 nm RF SOI CMOS process. The implications of the combined TID and temperature response are discussed for low-power RF design. [ABSTRACT FROM PUBLISHER]

Details

Language :
English
ISSN :
00189499
Volume :
61
Issue :
6
Database :
Complementary Index
Journal :
IEEE Transactions on Nuclear Science
Publication Type :
Academic Journal
Accession number :
100077121
Full Text :
https://doi.org/10.1109/TNS.2014.2360455