Al 2 O 3 Layers Grown by Atomic Layer Deposition as Gate Insulator in 3C-SiC MOS Devices.

Metal-oxide-semiconductor (MOS) capacitors with Al ₂ O ₃ as a gate insulator are fabricated on cubic silicon carbide (3C-SiC). Al ₂ O ₃ is deposited both by thermal and plasma-enhanced Atomic Layer Deposition (ALD) on a thermally grown 5 nm SiO ₂ interlayer to improve the ALD nucleation and guarantee a better band offset with the SiC. The deposited Al ₂ O ₃ /SiO ₂ stacks show lower negative shifts of the flat band voltage V _FB (in the range of about -3 V) compared with the conventional single SiO ₂ layer (in the range of -9 V). This lower negative shift is due to the combined effect of the Al ₂ O ₃ higher permittivity (ε = 8) and to the reduced amount of carbon defects generated during the short thermal oxidation process for the thin SiO ₂ . Moreover, the comparison between thermal and plasma-enhanced ALD suggests that this latter approach produces Al ₂ O ₃ layers possessing better insulating behavior in terms of distribution of the leakage current breakdown. In fact, despite both possessing a breakdown voltage of 26 V, the T-ALD Al ₂ O ₃ sample is characterised by a higher current density starting from 15 V. This can be attributable to the slightly inferior quality (in terms of density and defects) of Al ₂ O ₃ obtained by the thermal approach and, which also explains its non-uniform dC/dV distribution arising by SCM maps.