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A vertical WSe 2 -MoSe 2 p-n heterostructure with tunable gate rectification.

Authors :: Liu H
Hussain S
Ali A
Naqvi BA
Vikraman D
Jeong W
Song W
An KS
Jung J
Source :: RSC advances [RSC Adv] 2018 Jul 17; Vol. 8 (45), pp. 25514-25518. Date of Electronic Publication: 2018 Jul 17 (Print Publication: 2018).
Publication Year :: 2018
Abstract: Here, we report the synthesis of a vertical MoSe <subscript>2</subscript> /WSe <subscript>2</subscript> p-n heterostructure using a sputtering-CVD method. Unlike the conventional CVD method, this method produced a continuous MoSe <subscript>2</subscript> /WSe <subscript>2</subscript> p-n heterostructure. WSe <subscript>2</subscript> and MoSe <subscript>2</subscript> back-gated field effect transistors (FETs) exhibited good gate modulation behavior, and high hole and electron mobilities of ∼2.2 and ∼15.1 cm <superscript>2</superscript> V <superscript>-1</superscript> s <superscript>-1</superscript> , respectively. The fabricated vertical MoSe <subscript>2</subscript> /WSe <subscript>2</subscript> p-n diode showed rectifying I - V behavior with back-gate tunability. The rectification ratio of the diode was increased with increasing gate voltage, and was increased from ∼18 to ∼1600 as the gate bias increased from -40 V to +40 V. This is attributed to the fact that the barrier height between p-WSe <subscript>2</subscript> and n-MoSe <subscript>2</subscript> is modulated due to the back-gate bias. The rectification ratio is higher than the previously reported values for the TMDC p-n heterostructure grown by CVD.<br />Competing Interests: There are no conflicts to declare.<br /> (This journal is © The Royal Society of Chemistry.)