A Novel Programming Technique to Boost Low-Resistance State Performance in Ge-Rich GST Phase Change Memory.

MLA

Kiouseloglou, Athanasios, et al. “A Novel Programming Technique to Boost Low-Resistance State Performance in Ge-Rich GST Phase Change Memory.” IEEE Transactions on Electron Devices, vol. 61, no. 5, May 2014, pp. 1246–54. EBSCOhost, https://doi.org/10.1109/TED.2014.2310497.

APA

Kiouseloglou, A., Navarro, G., Sousa, V., Persico, A., Roule, A., Cabrini, A., Torelli, G., Maitrejean, S., Reimbold, G., De Salvo, B., Clermidy, F., & Perniola, L. (2014). A Novel Programming Technique to Boost Low-Resistance State Performance in Ge-Rich GST Phase Change Memory. IEEE Transactions on Electron Devices, 61(5), 1246–1254. https://doi.org/10.1109/TED.2014.2310497

Chicago

Kiouseloglou, Athanasios, Gabriele Navarro, Veronique Sousa, Alain Persico, Anne Roule, Alessandro Cabrini, Guido Torelli, et al. 2014. “A Novel Programming Technique to Boost Low-Resistance State Performance in Ge-Rich GST Phase Change Memory.” IEEE Transactions on Electron Devices 61 (5): 1246–54. doi:10.1109/TED.2014.2310497.