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Wafer-Level Packaging Design With Through Substrate Grooves as Interconnection for GaAs-Based Image Sensor.

Authors :
Wang, Shuangfu
Ye, Jiaotuo
Xu, Gaowei
Luo, Le
Source :
IEEE Transactions on Components, Packaging & Manufacturing Technology. Dec2013, Vol. 3 Issue 12, p2022-2028. 7p.
Publication Year :
2013

Abstract

A wafer-level packaging design for GaAs-based image sensor is presented. Key processes, such as GaAs/glass wafer bonding, GaAs substrate thinning, through substrate grooves (TSGs) fabrication, redistribution layer formation, polymer passivation, and laser jet bumping, are examined and characterized. GaAs image sensor package with 64 leads is successfully fabricated on 4-in thinned GaAs/glass test vehicle wafer. In the package, two long TSGs are wet etched as the interconnection path. Process parameters are systematically studied and given. Then, fabrication results of these processes were discussed. Finally, electrical tests show that ohmic contact is obtained with a resistance of around 30 \Omega between two nearby interconnections. [ABSTRACT FROM PUBLISHER]

Details

Language :
English
ISSN :
21563950
Volume :
3
Issue :
12
Database :
Academic Search Index
Journal :
IEEE Transactions on Components, Packaging & Manufacturing Technology
Publication Type :
Academic Journal
Accession number :
92943454
Full Text :
https://doi.org/10.1109/TCPMT.2013.2277607