Si cap passivation for Ge nMOS applications.

Authors :: Sioncke, S.
Vanherle, W.
Art, W.
Ceuppens, J.
Ivanov, Ts.
Lin, D.
Nyns, L.
Delabie, A.
Conard, T.
Struyf, H.
De Gendt, S.
Caymax, M.
Collaert, N.
Thean, A.
Source :: Microelectronic Engineering. Sep2013, Vol. 109, p46-49. 4p.
Publication Year :: 2013
Abstract: Highlights: [•] Si cap passivation on Ge shows low border trap response. [•] The Si cap passivation is also suitable for Ge nMOS applications. [•] Low D it at E c can be achieved by tuning the amount of Si at the interface. [•] A dry O3 process can be used to control the amount of Si that is oxidized. [Copyright &y& Elsevier]