Cite
Formulation and heuristic algorithms for multi-chip module substrate testing.
MLA
Murakami, Keisuke. “Formulation and Heuristic Algorithms for Multi-Chip Module Substrate Testing.” Computers & Electrical Engineering, vol. 39, no. 4, May 2013, pp. 1049–60. EBSCOhost, https://doi.org/10.1016/j.compeleceng.2012.12.020.
APA
Murakami, K. (2013). Formulation and heuristic algorithms for multi-chip module substrate testing. Computers & Electrical Engineering, 39(4), 1049–1060. https://doi.org/10.1016/j.compeleceng.2012.12.020
Chicago
Murakami, Keisuke. 2013. “Formulation and Heuristic Algorithms for Multi-Chip Module Substrate Testing.” Computers & Electrical Engineering 39 (4): 1049–60. doi:10.1016/j.compeleceng.2012.12.020.