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Polycrystalline silicon thin-film transistor with self-aligned SiGe raised source/drain.

Authors :
Peng, Du Zen
Chang, Ting-Chang
Shih, Po-Sheng
Zan, Hsiao-Wen
Huang, Tiao-Yuan
Chang, Chun-Yen
Liu, Po-Tsun
Source :
Applied Physics Letters. 12/16/2002, Vol. 81 Issue 25, p4763. 3p. 1 Diagram, 3 Graphs.
Publication Year :
2002

Abstract

We have fabricated a polycrystalline silicon thin-film transistor with self-aligned SiGe raised source/ drain (SiGe-RSD TFT). The SiGe-RSD regions were grown selectively by ultrahigh vacuum chemical vapor deposition at 550 °C. It was observed that, with SiH[sub 4] and GeH[sub 4] gas flow rates of 5 and 2 sccm, respectively, the poly-SiGe could be selectively grown up to 100 nm for source/drain regions. The resultant transistor structure features an ultrathin active channel region (20 nm) and a self-aligned thick source/drain region (120 nm), which is ideally suited for optimum performance. The significant improvements in electrical characteristics, such as higher turn-on current, lower leakage current, and higher drain breakdown voltage have been observed in the SiGe-RSD TFT, compared to the conventional TFT counterpart. These results indicate that TFTs with SiGe raised source/drain structure would be highly promising for ultrathin TFTs applications. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00036951
Volume :
81
Issue :
25
Database :
Academic Search Index
Journal :
Applied Physics Letters
Publication Type :
Academic Journal
Accession number :
8652448
Full Text :
https://doi.org/10.1063/1.1528727