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A performance evaluation of cache injection in bus-based shared memory multiprocessors

Authors :
Milenkovic, Aleksandar
Milutinovic, Veljko
Source :
Microprocessors & Microsystems. Mar2002, Vol. 26 Issue 2, p51. 11p.
Publication Year :
2002

Abstract

Bus-based shared memory multiprocessors with private caches and snooping write-invalidate cache coherence protocols are dominant form of small- to medium-scale parallel machines today. In these systems, the high memory latency poses the major hurdle in achieving high performance. One way to cope with this problem is to use various techniques for tolerating high memory latency. Software-controlled cache prefetching and data forwarding are two widely used techniques for tolerating high memory latency in scalable cache-coherent shared memory multiprocessors. However, some previous studies have shown that these techniques are not so effective in bus-based shared memory multiprocessors. In this paper, we propose a novel software-controlled technique called cache injection, which combines consumer and producer initiated approach, and broadcasting nature of bus. Performance evaluation based on program-driven simulation and a set of scientific applications and test benchmarks shows that cache injection is highly effective in reducing misses and bus traffic. [Copyright &y& Elsevier]

Subjects

Subjects :
*CACHE memory
*MULTIPROCESSORS

Details

Language :
English
ISSN :
01419331
Volume :
26
Issue :
2
Database :
Academic Search Index
Journal :
Microprocessors & Microsystems
Publication Type :
Academic Journal
Accession number :
7760323
Full Text :
https://doi.org/10.1016/S0141-9331(01)00146-6