Abstraction in Hardware System Design.

The article discusses hardware system design, examining abstracting mechanisms in hardware description languages (HDLs), standards, and behavioral semantics. The author argues that a universal HDL is needed which can be used for developing models, testing systems, and implementing details and looks at Bluespec SystemVerilog (BSV), an HDL which uses features from SystemVerilog and was inspired by the programming languages. Other topics addressed include the testing of systems-on-a-chip (SoCs) using software simulation, computation models, and the growth of hardware chip capacity according to Moore's law.