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Automating Logic Transformations With Approximate SPFDs.

Authors :
Yang, Yu-Shen
Sinha, Subarna
Veneris, Andreas
Brayton, Robert K.
Source :
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems. 05/01/2011, Vol. 30 Issue 5, p651-664. 14p.
Publication Year :
2011

Abstract

During the very large scale integration design process, a synthesized design is often required to be modified in order to accommodate different goals. To preserve the engineering effort already invested, designers seek small logic structural transformations to achieve these logic restructuring goals. This paper proposes a systematic methodology to devise such transformations automatically. It first presents a simulation-based formulation to approximate sets of pairs of functions to be distinguished and avoid the memory/time explosion issue inherent with the original representation. Then, it uses this new data structure to devise the required transformations dynamically without the need of a static dictionary model. The methodology is applied to both combinational and sequential designs with transformations at a single or multiple locations. An extensive suite of experiments documents the benefits of the proposed methodology when compared to existing practices. [ABSTRACT FROM PUBLISHER]

Details

Language :
English
ISSN :
02780070
Volume :
30
Issue :
5
Database :
Academic Search Index
Journal :
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems
Publication Type :
Academic Journal
Accession number :
60216993
Full Text :
https://doi.org/10.1109/TCAD.2011.2110590