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Timing-Aware Multiple-Delay-Fault Diagnosis.

Authors :
Mehta, Vishal J.
Malgorzata Marek-Sadowska
Kun-Han Tsai
Janusz Rajski
Source :
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems. Feb2009, Vol. 28 Issue 2, p245-258. 14p.
Publication Year :
2009

Abstract

With feature sizes steadily shrinking, manufacturing defects and parameter variations often cause design timing failures. It is essential that those errors be correctly and quickly diagnosed. In this paper, we analyze the multiple-delay-fault diagnosis problem and propose a novel approach to solve it. We enhance the diagnostic resolution by processing failure logs at various slower-than-nominal clock frequencies. We evaluate the utility of n-detection and timing-aware automatic-test-pattern-generated (ATPG) sets. Experimental results show that using timing-aware ATPG sets yields better diagnostic resolution and results in better delay-defect-size estimations compared to n-detection ATPG sets. We experimentally determined our diagnosis algorithm's sensitivity to delay variations. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
02780070
Volume :
28
Issue :
2
Database :
Academic Search Index
Journal :
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems
Publication Type :
Academic Journal
Accession number :
38698428
Full Text :
https://doi.org/10.1109/TCAD.2008.2009164