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A 1-GHz, multibit, continuous-time, delta–sigma ADC for Gigabit Ethernet

Authors :
Arias, J.
Quintanilla, L.
Enríquez, L.
Hernández-Mangas, J.
Vicente, J.
Segundo, J.
Source :
Microelectronics Journal. Dec2008, Vol. 39 Issue 12, p1642-1648. 7p.
Publication Year :
2008

Abstract

Abstract: In this work the design of a continuous-time modulator for Gigabit Ethernet applications is presented. The input bandwidth and oversampling ratio are, respectively, 62.5MHz and 8, resulting in a clock frequency of 1GHz. It was designed and implemented in a standard 90nm CMOS technology. The active area of the modulator measures . It consists of a loop filter based on RC-opamp integrators and a 3-bit quantizer which includes a data weighted averaging scrambler. A digital tuning scheme to deal with process variations has also been included. System level simulations including several non-ideal effects have been carried out in order to determine in detail the performance of the converter. Experimental results show a resolution of 7.1 effective bits, and a power consumption of 10.8mW from a nominal power supply of 1V. [Copyright &y& Elsevier]

Details

Language :
English
ISSN :
00262692
Volume :
39
Issue :
12
Database :
Academic Search Index
Journal :
Microelectronics Journal
Publication Type :
Academic Journal
Accession number :
35331102
Full Text :
https://doi.org/10.1016/j.mejo.2008.03.011