Accurate Litho Model Tuning Using Design-Based Defect Binning.

MLA

Vasek, Jim, et al. “Accurate Litho Model Tuning Using Design-Based Defect Binning.” IEEE Transactions on Semiconductor Manufacturing, vol. 21, no. 3, Aug. 2008, pp. 316–21. EBSCOhost, https://doi.org/10.1109/TSM.2008.2001204.

APA

Vasek, J., Svidenko, V., Nehmadi, Y., & Shimshi, R. (2008). Accurate Litho Model Tuning Using Design-Based Defect Binning. IEEE Transactions on Semiconductor Manufacturing, 21(3), 316–321. https://doi.org/10.1109/TSM.2008.2001204

Chicago

Vasek, Jim, Vicky Svidenko, Youval Nehmadi, and Rinat Shimshi. 2008. “Accurate Litho Model Tuning Using Design-Based Defect Binning.” IEEE Transactions on Semiconductor Manufacturing 21 (3): 316–21. doi:10.1109/TSM.2008.2001204.