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New Generation of Predictive Technology Model for Sub-45 nm Early Design Exploration.

Authors :
Wei Zhao
Yu Cao
Source :
IEEE Transactions on Electron Devices. Nov2006, Vol. 53 Issue 11, p2816-2823. 8p. 2 Black and White Photographs, 3 Charts, 15 Graphs.
Publication Year :
2006

Abstract

A predictive MOSFET model is critical for early circuit design research. To accurately predict the characteristics of nanoscale CMOS, emerging physical effects, such as process variations and correlations among model parameters, must be included. In this paper, a new generation of predictive technology model (PTM) is developed to accomplish this goal. Based on physical models and early-stage silicon data, the PTM of bulk CMOS is successfully generated for 130- to 32-nm technology nodes, with an Leff of as low as 13 nm. The accuracy of PTM predictions is comprehensively verified: The error of Ion is below 10% for both n-channel MOS and p-channel MOS. By tuning only ten primary parameters, the PTM can be easily customized to cover a wide range of process uncertainties. Furthermore, the new PTM correctly captures process sensitivities in the nanometer regime, particularly the interactions among Leff, Vth, mobility, and saturation velocity. A website has been established for the release of PTM: http://www.eas.asu.edu/∼ptm. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00189383
Volume :
53
Issue :
11
Database :
Academic Search Index
Journal :
IEEE Transactions on Electron Devices
Publication Type :
Academic Journal
Accession number :
23014002
Full Text :
https://doi.org/10.1109/TED.2006.884077