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The Effect of System Load on the Existence of Bit Errors in CDMA With and Without Parallel Interference Cancelation.
- Source :
-
IEEE Transactions on Information Theory . Oct2006, Vol. 52 Issue 10, p4733-4741. 9p. 3 Graphs. - Publication Year :
- 2006
-
Abstract
- In this correpsondence, we study a lightly loaded code-division multiple-access (CDMA) system with and without multistage hard- and soft-decision parallel interference cancelation (HO-PlC and SD-PlC). Throughout this paper we will only consider the situation of a noiseless channel, equal powers and random spreading codes. For the system with no or a fixed number of steps of interference cancelation, we give a lower bound on the maximum number of users such that the probability for the system to have no bit-errors converges to one. Moreover, we investigate when the matched filter system, where parallel interference cancelation is absent, has bit errors with probability converging to one. This implies that the use of HD-PIC and SD-PlC significantly enhances the number of users the system can serve. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 00189448
- Volume :
- 52
- Issue :
- 10
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Information Theory
- Publication Type :
- Academic Journal
- Accession number :
- 22613718
- Full Text :
- https://doi.org/10.1109/TIT.2006.881697