GaOx interlayer-originated hole traps in SiO2/p-GaN MOS structures and their suppression by low-temperature gate dielectric deposition.

MLA

Hara, Masahiro, et al. “GaOx Interlayer-Originated Hole Traps in SiO2/p-GaN MOS Structures and Their Suppression by Low-Temperature Gate Dielectric Deposition.” Applied Physics Letters, vol. 126, no. 2, Jan. 2025, pp. 1–6. EBSCOhost, https://doi.org/10.1063/5.0246368.

APA

Hara, M., Kobayashi, T., Nozaki, M., & Watanabe, H. (2025). GaOx interlayer-originated hole traps in SiO2/p-GaN MOS structures and their suppression by low-temperature gate dielectric deposition. Applied Physics Letters, 126(2), 1–6. https://doi.org/10.1063/5.0246368

Chicago

Hara, Masahiro, Takuma Kobayashi, Mikito Nozaki, and Heiji Watanabe. 2025. “GaOx Interlayer-Originated Hole Traps in SiO2/p-GaN MOS Structures and Their Suppression by Low-Temperature Gate Dielectric Deposition.” Applied Physics Letters 126 (2): 1–6. doi:10.1063/5.0246368.