High Memory Window, Dual‐Gate Amorphous InGaZnO Thin‐Film Transistor with Ferroelectric Gate Insulator.

Ferroelectric (FE) hafnium zirconium oxide (HZO) thin‐film transistors (TFTs) are of increasing interest for next‐generation memory and computing applications. However, these devices face challenges in achieving a substantial memory window (MW). This report presents amorphous InGaZnO (a‐IGZO) ferroelectric–dielectric (FD), dual‐gate thin‐film transistors (DG‐TFTs) with FE‐HZO as a bottom gate insulator (GI) and SiO2 as a top GI. The ferroelectricity in HZO is confirmed through the grazing incidence X‐ray diffraction (GI‐XRD), capacitance, and polarization measurements. The FD‐DG TFT can increase the MW by tuning the threshold voltage (<italic>V</italic>TH) due to electrostatic coupling between the top gate (TG) and bottom gate (BG). The increase of MW at the TG driving is related to the coupling factor which is equal to the ratio of the equivalent capacitance of top to bottom gated transistors. During the bottom sweep, the FD‐DG‐TFT demonstrates an anticlockwise hysteresis with a MW of 4.98 V, a high <italic>I</italic>ON/<italic>I</italic>OFF ratio of ≈106, and a steep subthreshold swing (SS) of 90 mV dec−1. On the contrary, MW of 12 V and SS of 140 mV dec−1 are observed for the top sweep operation. A thinner ferroelectric GI at BG TFT induces sufficient electrostatic coupling to cause a large <italic>V</italic>TH shift at TG driving, resulting in a boosted MW. [ABSTRACT FROM AUTHOR]