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Positive‐to‐negative tunable delay circuit designed with NGD RC network.

Authors :
Junwen, Shi
Junyan, Cui
Silochi, Hakim Epea
Wieser, Robert
Galan, Raul Sanchez
Murad, Nour Mohammad
Ravelo, Blaise
Source :
International Journal of Circuit Theory & Applications. Oct2024, Vol. 52 Issue 10, p5010-5024. 15p.
Publication Year :
2024

Abstract

Summary: Despite the performed progressive research work, the interpretation of the negative group delay (NGD) function remains not familiar to non‐specialist design and fabrication circuit engineers. The functionality misunderstanding limits the NGD circuit applications compared to other classical electronic functions. The present paper deals with the design of a tunable circuit by operating with positive and negative delay behaviors. The topology of the tunable circuit by using a low‐pass (LP) type NGD circuit is described. The design formulas for calculating the circuit resistor and capacitor parameters from the desired delay are expressed. The design feasibility of the tunable circuit composed of LP‐NGD cell and RC‐circuit is validated with a proof‐of‐concept (PoC) implemented on a test board. Two different signals with pulse and arbitrary waveforms having tens‐milliseconds duration were considered during the validation tests. As expected by tuning a varistor from 0.4 kΩ to 1 kΩ, the negative delay behavior varying from about −0.4 ms was verified thanks to the time‐advanced effect due to the LP‐NGD property. Then, the output signal delay was observed to become positive when the varistor was tuned from 1 kΩ to 3 kΩ. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00989886
Volume :
52
Issue :
10
Database :
Academic Search Index
Journal :
International Journal of Circuit Theory & Applications
Publication Type :
Academic Journal
Accession number :
180562376
Full Text :
https://doi.org/10.1002/cta.4010