High-Speed Power Allocation in NOMA System Using FPGA-Based DNN.

MLA

Yanamala, Rama Muni Reddy, and Muralidhar Pullakandam. “High-Speed Power Allocation in NOMA System Using FPGA-Based DNN.” Journal of Circuits, Systems & Computers, vol. 33, no. 14, Sept. 2024, pp. 1–13. EBSCOhost, https://doi.org/10.1142/S0218126624200044.

APA

Yanamala, R. M. R., & Pullakandam, M. (2024). High-Speed Power Allocation in NOMA System Using FPGA-Based DNN. Journal of Circuits, Systems & Computers, 33(14), 1–13. https://doi.org/10.1142/S0218126624200044

Chicago

Yanamala, Rama Muni Reddy, and Muralidhar Pullakandam. 2024. “High-Speed Power Allocation in NOMA System Using FPGA-Based DNN.” Journal of Circuits, Systems & Computers 33 (14): 1–13. doi:10.1142/S0218126624200044.