基于遗传算法的晶圆级芯片映射算法研究.

In recent years, with the development of artificial intelligence, deep learning has become one of the most important computing loads today. The next generation of artificial intelligence(AI)and high-performance computing applications have put unprecedented demands on the computing power and communication capabilities of computing platforms. Wafer-scale chips integrate ultra-high-density transistors and interconnect communication capabilities on the entire wafer, so it is expected to provide revolutionary computing power solutions for future AI and supercomputing platforms. Among them, the huge computing resources and unique new architecture of wafer-scale chips pose unprecedented challenges to task mapping algorithms. Related research has become a major focus of academic research in recent years. This paper focuses on studying the mapping methods of AI tasks on wafer-scale hardware resources. By expressing the AI algorithm as multiple convolutional kernels and considering the computational power characteristics of convolutional kernels, a mapping algorithm for wafer-scale chips is designed based on genetic algorithms. The simulation results under a series of mapping tasks verifies the effectiveness of the mapping algorithm and revealed the impact of parameters such as execution time and adapter cost on the cost function. [ABSTRACT FROM AUTHOR]