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Charge trapping layer enabled high-performance E-mode GaN HEMTs and monolithic integration GaN inverters.

Authors :
Jiang, Yang
Du, FangZhou
Wen, KangYao
He, JiaQi
Wang, PeiRan
Li, MuJun
Tang, ChuYing
Zhang, Yi
Wang, ZhongRui
Wang, Qing
Yu, HongYu
Source :
Applied Physics Letters. 6/10/2024, Vol. 124 Issue 24, p1-6. 6p.
Publication Year :
2024

Abstract

In this work, high threshold voltage and breakdown voltage E-mode GaN HEMTs using an Al:HfOx-based charge trapping layer (CTL) are presented. The developed GaN HEMTs exhibit a wide threshold modulation range of ΔVTH ∼ 17.8 V, which enables the achievement of enhancement-mode (E-mode) operation after initialization process owing to the high charge storage capacity of the Al:HfOx layer. The E-mode GaN HEMTs exhibit a high positive VTH of 8.4 V, a high IDS,max of 466 mA/mm, a low RON of 10.49 Ω mm, and a high on/off ratio of ∼109. Moreover, the off-state breakdown voltage reaches up to 1100 V, which is primarily attributed to in situ O3 pretreatment effectively suppressing and blocking leakage current. Furthermore, thanks to the VTH of GaN HEMTs being tunable by initialization voltage using the proposed CTL scheme, we prove that the direct-coupled FET logic-integrated GaN inverters can operate under a variety of conditions (β = 10–40 and VDD = 3–15 V) with commendable output swing and noise margins. These results present a promising approach toward realizing the monolithic integration of GaN devices for power IC applications. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00036951
Volume :
124
Issue :
24
Database :
Academic Search Index
Journal :
Applied Physics Letters
Publication Type :
Academic Journal
Accession number :
177896840
Full Text :
https://doi.org/10.1063/5.0208817