Back to Search Start Over

Temperature- and variability-aware compact modeling of ferroelectric FDSOI FET for memory and emerging applications.

Authors :
Chatterjee, Swetaki
Kumar, Shubham
Gaidhane, Amol
Dabhi, Chetan Kumar
Chauhan, Yogesh Singh
Amrouch, Hussam
Source :
Solid-State Electronics. Aug2024, Vol. 218, pN.PAG-N.PAG. 1p.
Publication Year :
2024

Abstract

In this paper, we present a temperature and variability-aware Verilog-A-based compact model for simulating Ferroelectric FET. The model captures the rich physics of ferroelectric materials and the important electrical characteristics, such as the history effect, the impact of pulse width and amplitude on threshold voltage, and temperature-dependent degradation of polarization. The impact of variability is also explored regarding reliable operation of the FeFET. The developed model is robust and can accurately capture the experimentally observed trends, such as the change in polarization due to temperature, increased memory window on reading from the back-gate, etc. Further, we discuss two applications of our developed model viz. (a) multi-level-cell storage and (b) FeFET-based array for MAC operations. The designs are tested using the proposed model in commercial SPICE simulator at different temperatures including the effect of variation. Analysis presented in this article reveals that variability and temperature can be detrimental for operation of FeFET-based systems. • We presented impact of temperature and variability on FeFET. • New compact model incorporating these effects • FeFET multi-level cell storage with 8 different states. • 8×8 FeFET crossbar for multiply-and-accumulate (MAC) operation. • Impact of temperature and variability on these applications [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00381101
Volume :
218
Database :
Academic Search Index
Journal :
Solid-State Electronics
Publication Type :
Academic Journal
Accession number :
177879406
Full Text :
https://doi.org/10.1016/j.sse.2024.108954