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Chemical Mechanical Polishing of Single-Crystalline Diamond Epitaxial Layers for Electronics Applications.

Authors :
Hardy, Aaron
Muehle, Matthias
Herrera-Rodriguez, Cristian
Becker, Michael
Drown, Edward
Baule, Nina
Tompkins, Mark
Grotjohn, Timothy
Albrecht, John D.
Source :
IEEE Transactions on Semiconductor Manufacturing. May2024, Vol. 37 Issue 2, p190-198. 9p.
Publication Year :
2024

Abstract

For single crystal diamond (SCD) to gain practical use in technical applications including solid state electronics, thin (< $1 ~\mu \text{m}$), doped epitaxial SCD layers with very low (<1 nm) surface roughness are required. Conventional SCD chemical mechanical polishing (CMP) processes are insufficient to meet the requirements of such applications because the material removal rate (MRR) is often characterized inappropriately, and the material removal uniformity is seldom considered. In this study, chemical vapor deposition (CVD) growth of two lightly boron doped (p-) epilayers was performed on 3° misoriented (100) high pressure high temperature substrates of 4.5 x $4.5 mm^{2}$ area. A subsequent 8-hour oxidative CMP process utilizing potassium permanganate and a novel self-leveling holder design decreased the average surface roughness from 3.83 nm and 1.57 nm to 0.20 nm and 0.16 nm for the two samples, respectively. MRRs were determined by evaluating five circular wear monitor structures in each sample by atomic force microscopy before and after the CMP process. The average MRRs were found to be 38.6 nm/hr and 37.3 nm/hr for the two samples. The purpose of this study is to demonstrate a CMP process suitable for polishing thin SCD epilayers to meet the needs of solid-state electronics applications. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
08946507
Volume :
37
Issue :
2
Database :
Academic Search Index
Journal :
IEEE Transactions on Semiconductor Manufacturing
Publication Type :
Academic Journal
Accession number :
177104206
Full Text :
https://doi.org/10.1109/TSM.2024.3383287