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Novel design of power-efficient quaternary logic gates using CNTFET.
- Source :
-
International Journal of Electronics . Jun2024, Vol. 111 Issue 6, p1054-1076. 23p. - Publication Year :
- 2024
-
Abstract
- This paper presents novel power-efficient designs of quaternary logic gates like Quaternary Minimum (QMIN) and Quaternary Maximum (QMAX), Standard Quaternary Inverter (SQI), Standard Quaternary NAND (SQNAND), Standard Quaternary NOR (SQNOR) and Standard Quaternary XOR (SQXOR) using Carbon Nanotube Field Effect Transistor (CNTFET). The designs are based on Pass Transistor Logic (PTL) and use only three types of Carbon Nanotube (CNT) diameters 0.626 nm, 1.018 nm, and 2.27 nm, which lead to lower fabrication costs and enhanced manufacturability when compared to the state-of-the-art designs. The designs are simulated in HSPICE with a 32 nm CNTFET model provided by Stanford University, and the average power and maximum propagation delay obtained from the simulation results are compared with other existing designs. It shows that the proposed designs require 75% to 90% less power and they achieve 73% to 91% less Power Delay Product (PDP) than the latest designs. [ABSTRACT FROM AUTHOR]
- Subjects :
- *LOGIC circuits
*CARBON nanotube field effect transistors
*CARBON nanotubes
Subjects
Details
- Language :
- English
- ISSN :
- 00207217
- Volume :
- 111
- Issue :
- 6
- Database :
- Academic Search Index
- Journal :
- International Journal of Electronics
- Publication Type :
- Academic Journal
- Accession number :
- 177038510
- Full Text :
- https://doi.org/10.1080/00207217.2023.2210300