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Detection of defective FinFET logic ICs by using FFTs.

Authors :
Widianto, W.
Lis, Robert
Sofiani, Inda Rusdia
Cynthia, La Febry Andira Rose
Source :
AIP Conference Proceedings. 3/26/2024, Vol. 2927 Issue 1, p1-5. 5p.
Publication Year :
2024

Abstract

A FinFET (Fin Field Effect Transistor) is a non-planar transistor. It has a faster-switching speed, lower power consumption, and static leakage current than CMOSs (Complementary Metal Oxide Semiconductors), which are planar transistors. In the FinFET logic ICs (Integrated Circuits) fabrication process, open defects may occur at interconnects between gates inside them. Open metals may cause defects. Since the FinFET ICs may be operated in high-speed time, the defects are more difficult to analyze in time domain signals. There is a method of FFT (Fast Fourier Transform) computing signals converted from the time domain signals into frequency domain signals. Then, the derived frequency signals will be expressed into the function of the Fourier series. In this paper, the FFT analysis is proposed to detect the defects inside the ICs. The logic ICs of Buffer, AND, and OR are designed by a SPICE (Simulation Program with Integrated Circuit Emphasis) netlist library distributed by Nexperia Co. Ltd. Then, the defects are inserted inside the designed ICs and simulated using LTspice created by Analog Devices Inc. Simulation results show that magnitude signals of defective logic ICs in the Fourier series will decrease linearly with increasing sizes of the defects. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
0094243X
Volume :
2927
Issue :
1
Database :
Academic Search Index
Journal :
AIP Conference Proceedings
Publication Type :
Conference
Accession number :
176251387
Full Text :
https://doi.org/10.1063/5.0192094