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Silent closure based pair verifier for fault pattern diagnosis of discrete event systems.
- Source :
-
IET Control Theory & Applications (Wiley-Blackwell) . Mar2024, Vol. 18 Issue 5, p603-613. 11p. - Publication Year :
- 2024
-
Abstract
- This paper addresses fault pattern diagnosis of discrete event systems, involving fault pattern detection and diagnosability. A fault pattern is modelled as a finite automaton whose accepted language is the objective to be diagnosed, representing the occurrence of complex or composite faults. A verifier for fault pattern detection based on the synchronous product of a system and a fault pattern is proposed. By removing all silent events, a silent closure is calculated based on the synchronous product, which offers computational advantages for systems that have a large number of silent events. An NSC/FSC pair verifier is then computed by taking the product of a normal silent closure and an accepted silent closure. By studying indeterminate cycles of the NSC/FSC pair verifier, necessary and sufficient verification conditions are established, asserting that a system is diagnosable with respect to a fault pattern if and only if there is no indeterminate cycle in the NSC/FSC pair verifier. It is shown that the proposed method requires polynomial time at most. Finally, a case study to illustrate the results is provided. [ABSTRACT FROM AUTHOR]
- Subjects :
- *DISCRETE systems
*FAULT diagnosis
*BASE pairs
*POLYNOMIAL time algorithms
Subjects
Details
- Language :
- English
- ISSN :
- 17518644
- Volume :
- 18
- Issue :
- 5
- Database :
- Academic Search Index
- Journal :
- IET Control Theory & Applications (Wiley-Blackwell)
- Publication Type :
- Academic Journal
- Accession number :
- 175964431
- Full Text :
- https://doi.org/10.1049/cth2.12593