Parallel accelerated computing architecture for dim target tracking on‐board.

MLA

Yu, Jiyang, et al. “Parallel Accelerated Computing Architecture for Dim Target Tracking On‐board.” Computational Intelligence, vol. 40, no. 1, Feb. 2024, pp. 1–17. EBSCOhost, https://doi.org/10.1111/coin.12604.

APA

Yu, J., Huang, D., Li, W., Wang, X., & Shi, X. (2024). Parallel accelerated computing architecture for dim target tracking on‐board. Computational Intelligence, 40(1), 1–17. https://doi.org/10.1111/coin.12604

Chicago

Yu, Jiyang, Dan Huang, Wenjie Li, Xianjie Wang, and Xiaolong Shi. 2024. “Parallel Accelerated Computing Architecture for Dim Target Tracking On‐board.” Computational Intelligence 40 (1): 1–17. doi:10.1111/coin.12604.