Beyond Moore's law – A critical review of advancements in negative capacitance field effect transistors: A revolution in next-generation electronics.

Conventional FETs, although serving as the backbone of modern electronics, have encountered fundamental limits in power efficiency due to the Boltzmann limit. Negative Capacitance (NC) FETs, leveraging the intriguing phenomenon of NC in certain ferroelectric materials, provide a ground-breaking solution by effectively amplifying the internal potential and enabling sub-60mV/dec switching. In this review paper, we explore the motivations behind the semiconductor industry's transition to NCFETs, including their potential to revolutionize low-power electronic devices. The concept of NC here is combined with all the transistors structures such as traditional MOSFETs, FinFETs, GAAFETs, and 2D material-based FETs. A unique insight into NCFETs is presented starting from general questions that concern regarding an NCFET. Physical concepts related to Ferroelectric NC, Transient NC, and Stabilized NC is discussed and modelling of MFS, MFIS, MFMIS structures is presented. A complete overview of NC devices pertaining to both experimental and simulation results are discussed. Several design considerations such as channel length scaling, thickness and gate stack optimization, hysteresis, material engineering, channel engineering, reliability (Self heating, Variability, Interface traps, Bias Temperature Instability, Radiation), annealing effects etc are discussed in detail. A future outlook that needs further developments to NCFET technology is also addressed which we believe will open the door to the advancements for low power electronic devices. [Display omitted] • Critically reviews the motivations behind the semiconductor industry's transition to NCFETs, including their potential to revolutionize low-power electronic devices. • A complete overview of NC devices pertaining to both experimental and simulation results are discussed. • Highlights the integration of NC concept into state of art devices such as MOSFETs, FinFET, NWFET, NSFET, and 2D material FETs. • Several design considerations such as channel length scaling, thickness and gate stack optimization, hysteresis, material engineering, channel engineering, reliability (Self heating, Variability, Interface traps, Bias Temperature Instability, Radiation), annealing effects etc are discussed in detail. • A future outlook that needs further developments to NCFET technology is also addressed. [ABSTRACT FROM AUTHOR]