A verilog implementation of advanced encryption algorithm on Artix-7.

As technology advances, the issue of data protection becomes more prevalent. Hackers now have access to modern sophisticated technologies and strategies for breaching any security gadget. Inevitably, people data security is an obstacle in today's era. Information safeguard can be obtained in software or hardware implementations. Artix-7 utilized in software implementation in this project because these gadgets are less complex, more versatile, and 1 effective. This research focuses on the software execution of this algorithm, is the safety measure algorithm. On a 28nanometers (nm) Artix-7, the AES is executed using the Vivado2019.1 ISE Design Suite, and the consequences are taken. This AES algorithm's architecture implementation and the resources, which has been implemented are Slice Register (SR), Look-Up Tables (LUTs), Input/Output (I/O), and Power. [ABSTRACT FROM AUTHOR]