Design of energy efficient domino logic circuit using lector technique.

MLA

Verma, Km Anjali, et al. “Design of Energy Efficient Domino Logic Circuit Using Lector Technique.” International Journal of Electronics, vol. 110, no. 11, Nov. 2023, pp. 2117–35. EBSCOhost, https://doi.org/10.1080/00207217.2022.2145500.

APA

Verma, K. A., Kumar, M., Kumar, S., & Chauhan, R. K. (2023). Design of energy efficient domino logic circuit using lector technique. International Journal of Electronics, 110(11), 2117–2135. https://doi.org/10.1080/00207217.2022.2145500

Chicago

Verma, Km Anjali, Manish Kumar, Saurabh Kumar, and R. K. Chauhan. 2023. “Design of Energy Efficient Domino Logic Circuit Using Lector Technique.” International Journal of Electronics 110 (11): 2117–35. doi:10.1080/00207217.2022.2145500.