Undoped junctionless EZ-FET: Model and measurements.

• An EZFET is a simple and reliable characterization device for substrates and gate stacks. • Junctionless EZFET removes the temperature limitation of junctions activation for low temperature integration applications. • A complete model reproduces the peculiar device behavior. • A simplified parameters extraction methodology provides reliable substrate and gate stack evaluation. • The junctionless EZFET can be used for two-dimensional that cannot be doped. The junctionless EZ-FET is a device with simplified architecture and processing. With only two lithography levels and using regular process steps, it enables fast electrical characterization of semiconductor films on insulators (SOI) with undoped source and drain. An electrical model reproducing the peculiar transfer characteristics of a junctionless EZ-FET is presented in this work. Based on this model, a simplified parameter extraction methodology is proposed and used to access the electrical properties of SOI structures (i.e. threshold voltage, mobility). [ABSTRACT FROM AUTHOR]