FMSLIC: Fast Memory-Efficient Structure for Implementation of SLIC on FPGA.

Superpixel segmentation has been widely used in computer vision as a preprocessing to reduce the number of image primitives for subsequent image processing tasks. Simple Linear Iterative Clustering (SLIC) is the most popular superpixel segmentation algorithm in the literature, which is an iterative algorithm. The basic SLIC technique includes two main steps named Assignment and Update steps, and their data dependency is the main problem to speed up execution of the basic SLIC algorithm. It is also well known that this algorithm is not memory efficient, which is the main bottleneck in applying basic SLIC in low-power applications. In this paper, we have proposed a new structure for SLIC implementation. This new structure replaces the cluster-based search operation with pixel-based process in the Assignment step that gains considerable speed improvement. This new technique simply removes the data dependency in the SLIC structure. In the proposed method, the distance index, the main parameter computed in the Assignment step, no longer is needed to be stored in memory. This leads to a significant improvement in the memory efficiency of the proposed structure. The proposed structure is implemented on the Virtex-5 FPGA family, and the results show about 26 % in memory improvement compared to basic SLIC. According to the implementation results, the proposed technique process 143 frames per second for an input image of 300 × 400 pixel resolution which is far faster than real-time process requirements. [ABSTRACT FROM AUTHOR]