A novel nanoprobing analysis flow by using multi-probe configuration to localize silicide defect in MOSFET.

It is demonstrated that nanoprobing technique is superior in localizing silicide defect rapidly in metal-oxide-semiconductor field-effect transistor (MOSFET). Cobalt silicide (CoSi 2) as an interfacial material below tungsten contact plug, various types of defects about CoSi 2 often cause leakage current in MOSFET, so close studies of problematic silicide is significant regarding MOSFET reliability enhancement. When one MOSFET in a combinational logic circuit is suspected of anomaly, because this kind of circuit is composed of several devices which are sometimes arranged in an active area (AA) of unique geometric shape, it is impossible to collect MOSFET characteristic correctly based on regular nanoprobing flow since conventional method hits limit for combined circuits measurement. Such circumstance almost impedes failure analysis (FA) in device level. Nevertheless, relying on our alternative strategy of multi-probe configuration, a novel nanoprobing analysis flow is adopted for device examination. It is shown that exact I-V characteristic of failed device can be captured by proposed workflow. Following I-V curve analysis further reveals an evident electrical signature of abnormal abrupt junction. It corresponds to an active area shorting with its surrounding nwell region. In addition, sophisticated leakage current behaviors are exhaustively interpreted by simplified models. Eventually, we confirmed CoSi 2 encroachment from the active area into nwell by the means of transmission electron microscopy (TEM) analysis. This paper presents an effective analysis to identify leaky junction of MOSFET in logic circuit that is rarely reported before. Furthermore, our exploration exhibits impressive flexibility of nanoprobing analysis in terms of localizing unusual silicide defect, so nanoprobe analysis is clearly an attractive option to optimize MOSFET manufacturing. • Propose a novel nanoprobing workflow to identify minute silicide encroachment into well of MOSFET. • Sophisticated leakage current behaviors are exhaustively interpreted by simplified models. • Demonstrate the merit of multi-probe configuration regarding analysis of faulty combinational logic circuit. [ABSTRACT FROM AUTHOR]