Design and Implementation of Robust Low Power ECG Pre-processing Module.

A robust low power Electrocardiogram (ECG) pre-processor is proposed to extract the useful information from biomedical signal. The methodology uses window-based efficient design that consumes less power and resources of Field Programmable Gate Array (FPGA). The comparison has been done among different window functions and filter architectures (Symmetric and Anti-symmetric). The entire hardware implementation is carried out on ZedBoard Zynq-7000 FPGA board. The inference has been drawn that symmetric Bartlett window consumes only 0.88%, 5.13%, and 9% of LUTs, slice registers and DSPs units respectively. 35mW of dynamic and 105 mW of static power is consumed by the pre-processor module. The proposed design is recommended to find applications in wearable and portable biomedical equipments. [ABSTRACT FROM AUTHOR]