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LSFQ: A Low-Bit Full Integer Quantization for High-Performance FPGA-Based CNN Acceleration.

Authors :
Bao, Zhenshan
Fu, Guohang
Zhang, Wenbo
Zhan, Kang
Guo, Junnan
Source :
IEEE Micro. Mar/Apr2022, Vol. 42 Issue 2, p8-15. 8p.
Publication Year :
2022

Abstract

The effective implementation of quantization depends not only on the specific task but also on the hardware resources. This article presents a hardware-aware customized quantization method for convolutional neural networks. We propose a learnable parameter soft clipping full integer quantization (LSFQ), which includes weight and activation quantization with the learnable clipping parameters. Moreover, the LSFQ accelerator architecture is customized on the field-programmable gate array (FPGA) platform to verify the hardware awareness of our method, in which DSP48E2 is designed to realize the parallel computation of six low-bit integer multiplications. The results showed that the accuracy loss of LSFQ is less than 1% compared with the full-precision models including VGG7, mobile-net v2 in CIFAR10, and CIFAR100. An LSFQ accelerator was demonstrated at the 57th IEEE/ACM Design Automation Conference System Design Contest (DAC-SDC) and won the championship at the FPGA track. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
02721732
Volume :
42
Issue :
2
Database :
Academic Search Index
Journal :
IEEE Micro
Publication Type :
Academic Journal
Accession number :
156247852
Full Text :
https://doi.org/10.1109/MM.2021.3134968