Field-programmable gate arrays-based Morris-Lecar implementation using multiplierless digital approach and new divider-exponential modules.

• Division-based Morris-Lecar (DBML) neuron model based on a new divider module and exponential terms. • Low-cost high-performance of original ML implementation using proposed DBML model by replacing complex non-linear function of original ML model with the multiplier-less exponential functions and simple division process of DBML. • Following the original ML model in terms of different spiking patterns and dynamical behaviors with employing DBML model. • Large-scale network implementation. Simulation, modeling, and hardware implementation of different parts of central nervous system (CNS) are very attractive research areas in terms of neuromorphic engineering aspects. Considering the neuronal parts of the human brain, the hardware implementation of neural models of spiking neural networks should be evaluated from preparing a simple efficient model and optimal hardware implementation. In this paper, Morris-Lecar (ML) model as a biological neuronal model with nonlinear differential equations and hyperbolic functions is discussed. This original model with non-linear complex functions needs high-computational high-cost hardware implementation on Field-Programmable Gate Arrays (FPGA). This paper presents a new divider module and exponential term (2 X ) to provide low-cost and high-speed implementation of original ML called Division-Based ML (DBML). DBML model suggests simpler equations using division-based exponential terms, logical shifts and simple arithmetic operations. Thus, high-performance neuronal design is presented following original ML model in terms of time domain and different dynamic behaviors. Global architecture based on digital hardware of the proposed DBML model including a novel divider module and Exponential-term evaluation [Display omitted] [ABSTRACT FROM AUTHOR]