A low noise current readout architecture with 160 dB transimpedance gain and 1.3 MHz bandwidth.

This paper proposes a low-noise readout circuit with a noise floor of 11 fA rms / sq (Hz) and a bandwidth of 1.3 MHz. The novel electrostatic discharge (ESD) leakage current cancellation stage allows the circuit to detect sub-pA range current input. A total trans-impedance gain of 160 dB is obtained by a current preamplification stage with a 100 × current gain followed by a transimpedance amplifier (TIA) with a 1 Mohm feedback resistive gain. The reader is designed in a 0.18 μ m CMOS process and consumes 5.6 mW from a 1.8 V supply. [ABSTRACT FROM AUTHOR]